1. Technical Field of the Invention
The present invention generally relates to electrical circuits. More particularly, and not by way of any limitation, the present invention is directed to a method and apparatus for mitigating the xe2x80x9chysteresis effectxe2x80x9d in a sensing circuit.
2. Description of Related Art
Electronic sensing circuits are used for measuring various physical phenomena relating to a system to be evaluated. In general, the sensing circuits may be comprised of one or more decision-making elements (e.g., comparators) and may operate as a multi-state evaluator for sensing the properties of interest upon application of a trigger signal. For example, a data sensing circuit may be used for measuring data logic levels provided by a xe2x80x9cdata-outputting circuitxe2x80x9d such as microprocessor when a clock signal is applied as a trigger.
It is well known that sensing circuits are prone to what is referred to as the xe2x80x9chysteresisxe2x80x9d effect, i.e., the lack of retraceability of a circuit""s operating curve from one state of operation to another state, which diminishes the circuit""s operating sensitivity over time. Consequences of hysteresis can be particularly deleterious in data interface circuitry used in high-speed microprocessor applications.
Accordingly, the embodiments of the present invention advantageously provide a method and apparatus for mitigating the hysteresis effect in a sensing circuit used in the evaluation of a property of a system under test by minimizing residence time of the sensing circuit in an unbalanced state. A state monitor circuit is included for detecting the sensing circuit""s state transition upon evaluating the system""s property, e.g., a data out signal level. A feedback control generator is provided for generating a control signal operable to transition the sensing circuit""s state to a balanced state, wherein the control signal""s logic state is capable of being modified substantially immediately upon completion of the evaluation operation.